12.5 Gb/s Parallel Channel BER Tester

PCB12500
12.5 Gb/s Parallel Channel BERT Controller

Highly cost effective solution for characterizing crosstalk susceptibility,
backplanes and multi-lane serial data systems

Product description

The PCB12500 is a 1.5-12.5 Gb/s Parallel Channel BERT with the capability to add a 0.5-16 GHz clock synthesizer (SCS16000 Series) and up to five remote heads on 3-foot (1-metre) cables. Interchangeable heads include a PRBS generator with either 2-tap or 4-tap de-emphasis, and PRBS error detector. Also available is a clock doubler remote head used only with the SB40B 40G BER Test system. For larger systems, multiple PCB12500 controllers can be used to increase the number of lanes tested in parallel.

The PCB12500 controller requires an external full-rate clock to drive the primary head. This same clock can also drive the other four heads or a second external clock can be used. The SCS16000J reference and jittered clock output can be used to apply clean or jittered clocks to the remote heads. The controller has highly-accurate multi-UI phase shift control for five heads; this allows heads to generate synchronized (or intentionally un-synchronized) outputs or make measurements with accurate clock/data alignment.

All features can be controlled through the PCB12500 control panel, SCS16000 control panel, or remotely through a GPIB or USB interface. Centellax offers a fully-functional software program, the Signal Integrity Studio, designed to control this instrument using your computer. We also offer a series of LabVIEW drivers at no cost.

Modular components

PCB12500 Datasheet