DC-20 GHz Programmable Prescaler
UXD20P
DC-20 GHz Programmable Binary Prescaler and Limiting Amplifier
Product descriptionThe UXD20P is a low noise DC to 20 GHz programmable prescaler featuring either divide-by-1, divide-by-2, divide-by-4, or divide-by-8 division ratios. In the divide-by-1 mode the UXD20P is also a broadband limit amplifier. The device features differential inputs and outputs, adjustable output swing, and high input sensitivity. The control inputs are CMOS and LVTTL compatible. The UXD20P is packaged in a 24-pin 4x4 mm leadless surface mount package. The UXD20P can be used as a general purpose, fixed modulus prescaler in high-frequency PLLs. The low phase noise of the divider makes it ideal for generating low-jitter synchronous clocks in telecom/datacom applications.
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Purchase parts
For international pricing please contact your local rep or distributor. Product performance
* Phase noise measured with 8GHz input at 10kHz offset. Product documentation |
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| Datasheet | UXD20P: datasheet | 1 Apr 2010 | 797kB | |||||||||||||||||||||||||
| Datasheet | UXD20PE: evaluation board | 7 Feb 2011 | 168kB | |||||||||||||||||||||||||
| Diagram | 4x4mm surface-mount QFN package | 17 Oct 2004 | 43kB | |||||||||||||||||||||||||
| Diagram | UXD20P PCB Layout Gerber | 20 Nov 2008 | 6.19MB | |||||||||||||||||||||||||
| Diagram | UXD20P PCB Layout PADS | 20 Nov 2008 | 450kB | |||||||||||||||||||||||||
| Diagram | UXD20P PCB Layout Schematic | 18 Nov 2008 | 34.7kB | |||||||||||||||||||||||||
Complementary products |
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| Divider | UXM15P: DC-15GHz Programmable Integer-N Prescaler | |||||||||||||||||||||||||||
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| AN08 | Surface-mount QFN package general handling and assembly | 23 Jul 2005 | 127kB | |||||||||||||||||||||||||
