DC-26.5 GHz Programmable Prescaler
DC-26.5 GHz Programmable 1,2,4,8 Binary Prescaler
The UXD20K is a low noise DC to 26.5 GHz programmable prescaler featuring either divide-by-1, divide-by-2, divide-by-4, or divide-by-8 division ratios. In the divide-by-1 mode the UXD20K is also a limit amplifier. The device features differential inputs and outputs, adjustable output swing and high input sensitivity. The control inputs are CMOS and LVTTL compatible. The UXD20K is packaged in a 24 pin, 4 mm x 4 mm ceramic leadless surface mount package. Hermetic option available.
The QFN package pad metallization consists of a 500-1000 micro-inch Sn63 automated solder dip process.
The UXD20K can be used as a general purpose, fixed modulus prescaler in high-frequency PLLs. The low phase noise of the divider makes it ideal for generating low-jitter, synchronous clocks in telecom applications.
This product is JEDEC MO-220 Compliant.
Meets MSL-1 Requirement.
* Phase noise measured with 8GHz input at 10kHz offset.
|Datasheet||UXD20K: datasheet||12 Nov 2012||733kB|
|Eval Board||UXD20PE: DC-20 GHz Programmable Binary Prescaler Evaluation Board||12 Nov 2012||81kB|
|Diagram||4x4mm surface-mount QFN package||17 Oct 2004||43kB|
|AN08||Surface-mount QFN package general handling and assembly|